Strategic Partnerships and Semiconductor Innovation
From OpenAI’s rumoured chip venture to a 3DIC test chip tape-out by Alchip and new university chip design initiatives, September 2025 was packed with developments across the semiconductor world. We’ve curated the month’s most relevant headlines to keep you informed and ahead of the curve.
Industry News & Developments
Synopsys Expands GenAI for Chip Design with Copilot
Synopsys announced major updates to its Synopsys.ai Copilot, extending both assistive and generative AI capabilities across the design flow. Early access results show up to 35% productivity gains for junior engineers and 10x-20x faster script generation. Copilot now supports automated RTL and formal assertion generation, cutting critical design and verification tasks from hours to minutes.
Vaire Demonstrates Reversible Computing in Test Chip
UK-based Vaire unveiled a prototype that demonstrates net energy recovery using reversible computing – leveraging techniques like adiabatic switching and energy recycling. Though still in the early stages, the test chip could pave the way for more energy-efficient processors in AI and data centre applications.
Alchip Validates 3DIC Ecosystem with Test Chip Tape-out
Alchip successfully taped out a 3nm/5nm 3DIC test chip using TSMC’s SoIC-X packaging. The project validated synchronous die-to-die (D2D) IP, DFT strategies, thermal modelling and 3D physical design, showcasing progress in stacked die systems for AI and high-performance computing.
TSMC & Synopsys Accelerate 2D/3D Design
TSMC and Synopsys have extended their collaboration – certifying Ansys simulation tools (HFSS-IC Pro, optiSLang, Zemax, Lumerical) for multiple nodes (N5, N3P, N2P, A16) and developing an AI-assisted optimization workflow for TSMC’s COUPE photonic/packaging platform.
Cadence Acquires Hexagon Design & Engineering Unit
Cadence announced a €2.7B acquisition of Hexagon’s Design & Engineering business, integrating mechanical solvers, multibody dynamics tools and multiphysics tools. The deal trengthens Cadence’s simulation and modeling capabilities across the silicon-to-systems stack.
OpenAI Moves Closer to In-House AI Chip
Industry reports suggest OpenAI is working on its own custom AI accelerator, potentially in partnership with Broadcom. The shift could reduce reliance on Nvidia and marks a strategic pivot toward proprietary silicon for large-scale AI workloads.
ATU Launches Semiconductor & Photonics Innovation Hub
A new research centre launched at the Atlantic Technological University campus in Letterkenny will focus on advanced semiconductor R&D, skills development and industry collaboration – boosting Ireland’s position in global chip innovation.
IBM & AMD Partner on Quantum-Centric Supercomputing
IBM and AMD are collaborating to develop hybrid quantum-classic supercomputers, combining quantum processors with AMD’s high-performance computing technologies to accelerate simulation, modelling and AI workloads in scientific and industrial applications.
Synopsys & GlobalFoundries Bring Chip Design to Universities
A new academic pilot program from Synopsys and GlobalFoundries will give students hands-on experience with industry-grade tools and manufacturing flows. Over 40 universities worldwide will participate in this “chip design to tape-out” initiative using GF’s MPW program.
Siemens Launches Tessent AnalogTest and TSMC Partnership
Siemens introduced Tessent AnalogTest, the first automated test generation tool for analog ICs. In parallel, it also announced deeper collaboration with TSMC to enhance test, yield and verification in analog and mixed-signal designs.
Qualcomm & BMW Extend AD System to All Automakers
Previously exclusive to BMW’s iX3, Qualcomm’s Snapdragon-based AD system is now available to all automakers – bringing AI-based perception and drive policy engines to a wider range of vehicles worldwide.
Ayar Labs & Alchip Launch Optical I/O AI ASIC Reference Design
The companies unveiled a high-bandwidth (200–250 Tb/s) reference platform that integrates optical I/O engines, HBM and interposers using TSMC’s COUPE technology – targeting scalable, multi-die AI ASIC designs.
Serbia Boosts Digital Ambitions with Major Data Center Expansion
Serbia’s government signed an MoU with e& enterprise to triple the state’s data centre capacity, adding up to 40 MW to the existing Kragujevac facility. The investment is set to strengthen regional infrastructure, with ambitions to support AI workloads and attract global tech providers to the Balkans.
Alphawave Semi Tapes Out Industry-Leading UCIe IP
Alphawave Semi announced the successful tape-out of its Gen3 UCIe IP, achieving 64 Gbps per I/O pin on TSMC’s 3nm process. The design doubles shoreline bandwidth density and supports next-gen chiplet architectures, enabling more scalable AI and multi-die systems.
Ireland Backs European Chips Act 2.0 with Semicon Coalition Endorsement
Government Minister Peter Burke reaffirmed Ireland’s support for the European Semiconductor Coalition’s Declaration, aimed at shaping the next iteration of the Chips Act. The move aligns with Ireland’s Silicon Island strategy to expand chip R&D, manufacturing, skills and supply chain sovereignty.
Technical Reads & Research Highlights
| Title | Source |
|---|---|
| AI’s Value In Chip Design Depends On Data Availability | SemiEngineering |
| RISC-V: Shaping the Future of Mobility with Open Standards | EETimes |
| New chip design cuts AI energy use by enabling smarter FPGA processing | TechXplore |
| 2025 Critical Hardware Weaknesses (Hardware CWE Special Interest Group) | SemiEngineering |
| How AI is transforming DRC verification | ElectronicDesign |
| A point of view on ”Analog Design and Layout Migration automation in the AI era” | Design & Reuse |
| New Demands For IP Reuse | SemiEngineering |
| Addressing the Challenges of Chip Design Verification | Embedded |
| Putting 3D IC to work for you | EDN |
| The Future of Data Centers: How VLSI and Chip Design Are Driving the Next Wave of Innovation | WiPro |
| 3D-ICs In The Automotive Market: Breaking Barriers With AI-Driven EDA Tools | SemiEngineering |
| How Multiphysics Is Powering The Future Of 3D-ICs | SemiEngineering |
| Adapt or Fall Behind: The Critical Need for Engineers to Master AI | EETimes |
| New Auto Test Capability for the Analog Portions of SoCs | EE Journal |
| AI On: 6 Ways AI Agents Are Raising Team Performance — and How to Measure It | Nvidia |
| AI Agents For UVM Generation: Challenges And Opportunities | SemiEngineering |
| Building resilient semiconductor supply chains amid global tensions | Omdia |
| Custom hardware helps deliver safety and security for electric traction | EDN |
| Overview Of Incorporating LLMs Into EDA, With 3 Case Studies (TU Munich Et Al.) | SemiEngineering |
| HW Security: 2.5D And 3D Technologies Provide Opportunities In Designing Secure Systems (UCSB, Columbia) | SemiEngineering |
Videos
Explore the latest videos covering chip design, AI, accelerated computing and more from the world of semiconductors:
- Hot Chips 2025 Keynotes: Catch keynote presentations from top leaders in high-performance and AI-driven chip design
- Silicon Grapevine – Mike Doogue: Allegro Microsystems’ CEO shares his career journey from design engineer to executive leader
- Arteris on Chiplets: Ashley Stevens, director of product management and marketing at Arteris discusses chiplet integration benefits and challenges on Semiconductor Engineering’s YouTube channel
- NVIDIA Jensen Huang on AI: On the BG2 podcast, Huang explores AI infrastructure, global compute demands and the evolving ASIC vs GPU debate
- Purdue’s ‘Changing the World with Chips’: An interactive seminar series introducing students to the world of semiconductors and real-world career paths
Keep Up with Semiconductor Innovation
From AI-driven chip design to breakthroughs in 3DICs and government-backed semiconductor initiatives, September proved just how dynamic and fast-moving the industry continues to be. Whether you’re tracking design innovations, ecosystem partnerships or technical research, staying up to date is more essential than ever.
Check back next month for our October roundup, where we’ll continue our delivery of the most impactful news, breakthroughs and insights shaping the future of semiconductors.