Semiconductor News & Industry Developments
Stay ahead in semiconductors with our November 2025 roundup. From AI-driven chip design and quantum ASIC developments to breakthroughs in verification and photonics, this edition highlights key industry moves, technical insights and must-watch videos.
ChipAgents Raises $21 Million for Agentic Chip Design
Startup ChipAgents closed a USD $21 million Series A round, backing its agentic-AI platform aimed at automating RTL generation, testbench creation and verification workflows via “language-based commands”. With existing deployments in 50+ semiconductor firms and 80% productivity gains reported, the funding signals a growing momentum behind AI-first EDA tools.
NVIDIA & Samsung to Build AI Factory
NVIDIA and Samsung announced a new AI-factory project which will combine more than 50,000 NVIDIA GPUs with advanced manufacturing technologies. The proposed facility aims to merge accelerated compute with chip manufacturing, harnessing data-driven operation and predictive maintenance across design-to-fab workflows.
BOS Semiconductors & Tenstorrent Announce Partnership
In a strategic move, BOS Semiconductors and Tenstorrent announced a collaboration to establish Open Chiplet Atlas, an open chiplet ecosystem aimed at speeding up semiconductor innovation. Together they aim to drive large scale adoption of chiplet based designs, enabling reusable die-to-die IP and open standards that streamline advanced SoC development across AI and HPC applications.
Google Cloud Announce 7th Gen TPU Lineup for AI Workloads
Google Cloud rolled out the new “Ironwood” TPU lineup alongside Axion-based VM instances, designed to support large scale inference workloads in enterprise AI. The move marks a shift towards infrastructure-optimised hardware paired with cloud services to power the “new age of inference”.
Volkswagen Group Introduces its First Self-Designed Chip
Volkswagen Group China announced plans to develop its first in-house SoC, highlighting a new chapter in vehicle OEM silicon strategy. The chip targets vehicle electrification, connectivity and domain control units – underlining the automotive industry’s push towards in-house hardware and chip sovereignty.
SAICEC & Siemens Partner to Accelerate Chip-to-Vehicle Validation
SAICEC has partnered with Siemens to build complex digital twins of automotive architectures using Siemens’ PAVE360 platform, enabling certified system-to-chip level verification for software-defined vehicles. “With Siemens’ PAVE360 system-to-chip digital twin capabilities, we can shorten development cycles, improve functional safety and strengthen the foundation for intelligent mobility design,” said David He, chief executive officer, SAICEC.
NVIDIA Unveils Apollo: Open AI Models for Engineering Simulation
NVIDIA introduced Apollo, a new family of open AI physics models designed to accelerate simulation across semiconductor, automotive, aerospace and industrial engineering. Built on NVIDIA’s accelerated computing stack, Apollo provides domain-specific, physics-optimised models — spanning computational lithography, defect detection, CFD, electromagnetics, structural mechanics, climate forecasting and more.
QuickLogic eFPGA Hard IP Adopted by Chipus for 12nm Data Centre ASIC
QuickLogic announced that its eFPGA Hard IP has been selected by Chipus for a high-performance 12nm data centre ASIC. The integration of eFPGA was a core requirement for the design, enabling reduced ASIC risk, faster development cycles and long-term product flexibility through reprogrammability.
Microsoft Launches Cobalt 200, an Arm-based CPU for Next-Gen AI Data Centre
Microsoft unveiled Cobalt 200, its next-generation Arm-based CPU for Azure and the first publicly announced silicon built on the Arm Neoverse CSS V3 platform. Designed for the era of converged AI data centres, Cobalt 200 pairs general-purpose compute with specialised accelerators, networking, storage and security offload to support AI training, fine-tuning and deployment at hyperscale.
SEALSQ Plans New European Hub Dedicated to Quantum ASIC Design
SEALSQ, alongside WISeKey and IC’Alps, has inaugurated the Grenoble Node of the SEALSQ Quantum Corridor, establishing a new European hub dedicated to Quantum ASIC design and secure semiconductor integration. The facility will drive development of low-power, post-quantum integrated circuits using NIST-approved CRYSTALS-Kyber and Dilithium algorithms, merging classical and quantum logic to protect against future quantum attacks.
Cadence Expands Verification IP Portfolio with 10 New AI-Focused Protocols
Cadence has introduced 10 new Verification IP (VIP) targeting emerging high-bandwidth, low-power interfaces for AI designs, including UALink, UEC, LPDDR6, UCIe 3.0, AMBA CHI-H, eUSB2 and UniPro 3.0. These VIP packages include UVM SystemVerilog test suites that accelerate bring-up, improve early bug detection and help engineers ensure designs meet the latest standards.
GlobalFoundries Acquires AMF & InfiniLink to Boost AI Data Centre Photonics
GlobalFoundries has acquired Advanced Micro Foundry (AMF) and InfiniLink to expand its silicon photonics capabilities for AI data centres and long-haul communications. The combined assets enable GF to offer end-to-end photonics solutions, accelerating innovation, improving bandwidth and reducing energy per bit across data centre and emerging markets like sensing, LiDAR and quantum systems.
Technical Reads & Research Highlights
| Title | Source |
|---|---|
| Complex, AI-Enabled Small Processors and Cybersecurity Will Dominate Embedded System Designs Going Forward | Embedded |
| Makefile vs. YAML: Modernizing verification simulation flows | EDN |
| Small Vs. Large Language Models | SemiEngineering |
| Why And How Modern Chip Design Is Automated | Forbes |
| Building And Validating FreeRTOS-Based Virtual ECUs: A Comprehensive Approach | SemiEngineering |
| Physical AI Era: Machines Must Learn to See Before They Can Think | EETimes |
| Mastering multi-physics effects in 3D IC design | EDN |
| 10 Tips for First-Pass Silicon Success in AI Chip Development | Synopsys |
| Building quantum computers with leading-edge semiconductor fab | IBM |
| Noise: A Chip Killer | SemiEngineering |
| From Spec to Silicon: Successful Physical AI System Chiplet Bring-Up | Cadence |
| Towards a Formal Verification of Secure Vehicle Software Updates | Cornell University |
| Are You Stuck in PCIe Traffic? From Software to Hardware to System | Synopsys |
| Lessons from the DeepChip Wars: What a Decade-old Debate Teaches Us About Tech Evolution | SemiWiki |
| New Ultra-Fast Debug Solution for Palladium Emulation with Verisium Debug | Design & Reuse |
| Intel’s 4004: The Chip That Changed History | Design News |
| Building Better Qubits with GPU-Accelerated Computing | NVIDIA |
| Faster Bug Discovery And Coverage Closure | SemiEngineering |
| A Comprehensive Digital Twin Environment and Semiconductor Lifecycle Management Can Ensure Reliable Data-Center Operations | Embedded Computing |
| 3DKs: Making Headway On Chiplet Standards | SemiEngineering |
Videos
Explore the latest videos covering chip design, verification and more from the world of semiconductors:
- Changes in Mixed-Signal IC Verification: Shekar Chetput, software engineering group director at Cadence, explores mixed-signal simulations and how to improve reliability for complex, high-cost ICs.
- UVM Basics Explained Through Coffee: 2ChipDesign uses a coffee-order analogy to build a complete UVM verification environment, making key concepts like DUTs, agents, sequences and scoreboards easy to understand for beginners.
- IPOs and Exits: In the first episode of S2 The AI Hardware Show, Ian Cutress and Sally Ward-Foxton discuss companies that have exited the AI startup space.
Your Monthly Roundup: What’s Next for Semiconductors?
November 2025 showcased a surge in AI-driven innovation, strategic partnerships, and advanced verification methods in the semiconductor industry. From quantum ASIC hubs to AI-first chip design platforms and silicon photonics expansion, these developments reflect the industry’s rapid evolution and the growing importance of secure, efficient and scalable semiconductor solutions. Stay tuned for future editions as we continue to track the breakthroughs shaping the next generation of chips.
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