RISC-V International Launches Centralised Specifications Library
In early May 2026, RISC-V International announced the official launch of the RISC-V Ratified Specifications Library, a centralised documentation hub designed to consolidate all ratified RISC-V specifications into a single accessible location.
Over the years, documentation across the RISC-V ecosystem has become increasingly fragmented, making the new RISC-V Ratified Specifications Library an important step forward for developers, ASIC teams and software engineers alike.
RISC-V specifications have historically been spread across multiple GitHub repositories, draft pages, mailing lists and independently maintained documentation sources. For engineers working in ASIC design, verification, firmware, operating systems or toolchain development, simply finding the correct specification version could sometimes become a challenge.
As the RISC-V ecosystem continues expanding across embedded, AI, datacenter and application-class hardware, the need for a single authoritative documentation source has become increasingly important.
Why the RISC-V Ratified Specifications Library Matters
Modern semiconductor development depends heavily on stable, accessible and standardised documentation.
Whether teams are developing:
- Application processors
- Embedded microcontrollers
- AI accelerators
- Firmware stacks
- Verification environments
- Datacenter-class SoCs
…clear specifications are critical for maintaining interoperability, compliance and long-term software support.
The new RISC-V Ratified Specifications Library helps address one of the ecosystem’s longstanding pain points by consolidating ratified specifications into both HTML and PDF formats under a single platform.
According to RISC-V International, the library organises specifications into logical categories covering:
- Architecture
- Hardware infrastructure
- Platform software
- Debugging and trace
- Application enablement
For ASIC design and verification teams, this should significantly improve day-to-day workflow efficiency. Instead of navigating scattered repositories and draft branches, engineers can now access stable references from one centralised documentation environment.
Key Specifications Included in the RISC-V Ratified Specifications Library
The RISC-V Ratified Specifications Library already contains a broad set of ratified specifications spanning multiple areas of the RISC-V ecosystem.
Core ISA Documentation
At the centre are the foundational architecture specifications:
Volume I: The Unprivileged ISA Specification
This specification defines all user-level instructions and ratified extensions available to software running without elevated privileges. It serves as a key reference for compiler writers, application developers and engineers implementing RISC-V cores.
Volume II: The Privileged ISA Specification
The companion to Volume I covers privileged execution modes, supervisor and machine-mode control, trap handling and the system-level registers required for operating system and hypervisor support.
For ASIC and verification engineers, these specifications remain foundational references for ISA compliance validation and architectural verification planning.
RISC-V Profiles and Ecosystem Standardisation
One particularly important area highlighted in the announcement is the growing role of standardised RISC-V profiles.
RVA23 Profile
The RVA23 Profile establishes a stable application processor baseline by defining mandatory extensions and software expectations.
This represents a major milestone for the RISC-V ecosystem because software portability has historically been one of the biggest challenges facing open ISA platforms.
With RVA23-compliant hardware expected to arrive soon, operating system vendors and software developers gain a far more predictable target platform. For ASIC developers building application-class processors, this significantly reduces ecosystem fragmentation concerns.
Expanding Beyond the ISA
The new RISC-V Ratified Specifications Library also highlights how far the ecosystem has evolved beyond the core instruction set itself.
Included specifications now cover a broad range of platform technologies.
Hardware Infrastructure
- Advanced Interrupt Architecture (AIA)
- Input/Output Memory Management Unit (IOMMU)
- Platform Level Interrupt Controller (PLIC)
- Server SoC requirements
Debug and Trace
- Efficient Trace
- Debug Specification
- N-Trace
- Trace Control Interface
- RAS Error Record Interface
Platform Software
- Supervisor Binary Interface (SBI)
- Boot and Runtime Services (BRS)
- Platform Management Interface (RPMI)
- UEFI Protocol support
Application Enablement
- Application Binary Interface (ABI)
- Vector C Intrinsics
This broader scope demonstrates how RISC-V is steadily evolving from an ISA into a complete platform ecosystem capable of supporting everything from embedded systems to datacenter deployments.
What’s Next for the RISC-V Ecosystem?
The launch of the RISC-V Ratified Specifications Library may not generate the same headlines as a new processor or AI accelerator announcement, but it represents something equally important: ecosystem maturity.
Strong semiconductor ecosystems are built not only on hardware innovation, but also on documentation quality, tooling, standards governance and developer accessibility.
By centralising ratified specifications, profiles, debug standards and platform documentation into a single accessible resource, RISC-V International is making adoption easier for ASIC designers, verification engineers and software developers alike.
As RISC-V adoption continues expanding across embedded systems, AI infrastructure and datacenter hardware, documentation accessibility and ecosystem consistency will become increasingly important for long-term platform scalability.