August 2026 brought a wide range of developments across the semiconductor industry, from AI-driven chip design and custom silicon to new memory architectures, hardware security and verification. This semiconductor news roundup brings together key industry announcements, technical research and upcoming webinars for ASIC, verification and semiconductor engineers.
Semiconductor News Headlines
From new AI and EDA developments to advances in chiplets, post-quantum security and ASIC design, here are some of the semiconductor stories and technical resources worth knowing from August 2026.
- Nvidia Partner ChipAgents Secures $60 Million to Advance Chip Design Using AI Agents
- Ericsson Locks All Three Japan Carriers on Custom Silicon as Docomo Deploys New Baseband
- Siemens tools certified for Intel process nodes
- Cadence Develops Agentic AI Platform for PCB Design
- Confirming rumors, Anthropic reveals plan to develop custom chip
- Samsung Unveils First 3D Memory to Eliminate Bottlenecks by Stacking HBM, NAND
- EnSilica wins €1.7m satellite chip contract and joins 5G-aNTeNna consortium
- AI Chip Startup Taalas Acquired by AMD
- Siemens EDA Says AI Can Cut Chip Design Time by Up to 10x
- Altera Expands DDR5 and LPDDR5 Support Across Agilex FPGAs
- Stripe will reportedly acquire AI gateway startup OpenRouter for $7B+
- Samsung accelerates SoC design in South Korea with Claude, narrowing Qualcomm gap
- Waymo develops custom ASIC chip to improve robotaxi performance
- Xiaomi launches new Xring chip, partners with TSMC for production, sources say
- STMicroelectronics Bets on Hardware-Based Post-Quantum Cryptography with ST54M
- New post-quantum chip architecture passes key milestone in 28nm test environment
- Anthropic bets on in-house chips, reshaping ASIC orders
- Apple introduces M6 and M5 Ultra for a big leap in performance and AI compute
- NSA Releases Best Practices to Mitigate Threats in Development of ASICs
- Google’s TPU v10 turns multi-vendor, deepening MediaTek’s ASIC role
- OpenAI Jalapeño: Better Than Nvidia Blackwell
- Waymo announce plans to bring robotaxis to Germany in 2027
Technical Reads & Research Highlights
| Title | Source |
|---|---|
| Scientists develop a groundbreaking chip that operates at brain-like speed | DataQuest |
| Silicon to system thermal co-design | New Electronics |
| Modular Verification Of RTL Processors Against ISA Contracts (MIT, Google, UW) | SemiEngineering |
| Could EDA AI Startups Be The New Claude Of Chip Design? | Forbes |
| From Blueprint To Build: Engineering The World’s Largest AI Chips | SemiEngineering |
| The Autonomous Chip-To-System Engineer Has Arrived | SemiEngineering |
| Chiplet Architectures as a Practical Path to Scalable Automotive Compute | EE Times |
| The Next Big Chip Failure May Be A Security One | SemiEngineering |
| Standards and AI will shape-shift EDA | Electronics Weekly |
| Why verification matters in modern chip design | Data Center Dynamics |
| A novel chip-on-wafer platform for next-generation AI hardware | Tech Xplore |
| The Emergence of Electronics Digital Twins (eDTs) | Synopsys |
| Memory-Aware ASIC Design for AI Workloads | Design & Reuse |
| First-Pass Silicon Success at Advanced Nodes: How to De-Risk Tapeout | All About Circuits |
| How thermal constraints are changing the semiconductor design process | Electronics Weekly |
| The Rise of Autonomous Chip Design | EE Times |
| How ASIC Architectures Are Advancing Next-Generation Radar | Eureka Magazine |
| From Spec To Formal Properties | SemiEngineering |
| Hardware security verification must go beyond functional testing | EDN |
| Navigating ISO 26262 Part 11: A Guide for Semiconductor Architects | Arteris via Design & Reuse |
| Verified. Until It Isn’t: Why Datapath Verification Needs A New Playbook | SemiEngineering |
| Beyond Trusted: What the NSA’s New Guidance Means for Hardware Security | Rambus via Design & Reuse |
Webinars for ASIC Engineers
| Date | Webinar | Provider |
|---|---|---|
| 18th September 2026 | C/C++ Memory Management: Heap Memory: This webinar explores common mistakes and solutions to memory usage in C and C++ using the heap. The webinar includes: Approaches to avoiding memory usage bugs by illustration & Contrasts between the C and C++ programming languages. | Doulos |
| 23rd September 2026 | [3 Parts ] Low-Power Verification: Master the methodologies for verifying modern low-power semiconductor designs, from block-level power intent verification to full System-on-Chip (SoC) power management and verification sign-off. | Alpinum Events |
| 12th October 2026 | Multi-Level Hardware Debug – Part 1 – Block-Level RTL Debug: Master the fundamentals of RTL debugging using industry-proven verification methodologies, simulation workflows, and formal verification techniques. This practical training equips engineers with the skills needed to identify, analyse, and resolve complex RTL design issues using the same structured approaches adopted by leading semiconductor companies. | Alpinum Events |
| 13th October 2026 | FPGA Design Flow Automation using Agentic AI: This webinar will discuss the use of Agentic AI to automate your FPGA design flow. Agentic AI will interface with AMD’s Vivado™ IDE to implement design flow automation. | Doulos |
| On-demand | An Introduction to Software Prototyping: Unlocking SoC Software Verification with proFPGA CS: This webinar targets engineering and verification teams looking to accelerate System on Chip (SoC) hardware/software validation through FPGA prototyping. Discover how the Veloce™ proFPGA CS platform delivers a flexible, modular architecture that scales across the full spectrum of SoC software verification needs. | EE Times |
From AI-assisted chip design and custom silicon to verification, hardware security, thermal management and chiplet architectures, August 2026 highlighted the continued evolution of semiconductor engineering. Alongside the latest industry announcements, the month’s technical resources offer practical insight into the challenges shaping modern ASIC and SoC development.
For engineers working across ASIC design, design verification, EDA and semiconductor development, keeping up with these developments can help identify emerging technologies, methodologies and areas of industry focus. Check back for future semiconductor news roundups covering the latest industry developments, technical resources and engineering events.