On March 2nd 2026, Accellera Systems Initiative announced it has approved the Standard for IP Abstraction for Clock and Reset Domain Crossing Integration 1.0 for release and is now available for download.
The new specification introduces a vendor-neutral mechanism for capturing and exchanging clock domain crossing (CDC) and reset domain crossing (RDC) intent, enabling more consistent signoff across IP and SoC development environments.
Addressing a Long-Standing Verification Challenge
CDC and RDC verification plays a critical role in preventing metastability, glitches and data reconvergence errors when signals cross asynchronous clock or reset boundaries. However, until now, the industry has lacked a standardised way to share CDC/RDC “intent” and analysis results across different EDA tools.
In heterogeneous design environments, particularly in IP-based SoC development where components originate from multiple internal and external sources, this limitation has often required redundant analysis runs, manual interpretation or tool-specific translation during integration.
The newly approved standard defines a unified abstraction model that enables interoperable CDC/RDC collateral exchange across the EDA ecosystem. By establishing a common, tool-independent representation of intent, the standard is designed to support more efficient signoff from IP development through full SoC integration.
Enabling Interoperability Across the SoC Ecosystem
According to Accellera leadership, the standard reflects the organisation’s broader mission of fostering open, collaborative solutions to shared design and verification challenges.
Lu Dai, Chair of Accellera, described the release as a major step toward improving interoperability and accelerating SoC signoff with greater confidence. He also acknowledged the cross-company collaboration and volunteer contributions that enabled the working group to deliver a practical, market-driven specification.
By providing a vendor-neutral abstraction layer, the standard reduces reliance on shared toolchains or internal expertise and supports portable interpretation of CDC/RDC intent across design flows.
Accellera Tutorial at DVCon U.S. 2026
Accellera will present the new standard during a tutorial at DVCon U.S. 2026 titled:
“Breakthrough in CDC-RDC Verification: Defining a Standard for Interoperable Abstract Model.”
The session will examine the methodology, scope and technical foundations of the standard, offering practical guidance for applying it in IP and SoC design flows. The tutorial is scheduled for Thursday, March 5, from 9:00 a.m. to 12:30 p.m. at the Hyatt Regency Santa Clara, Ballroom D.