Semiconductor News Roundup: September 2026
September 2026 brought further developments across the semiconductor industry, from ASIC design and verification to AI-assisted engineering, advanced packaging and EDA. This month’s semiconductor news roundup highlights key industry developments, including new AI-driven verification tools, advanced semiconductor design collaborations, security guidance for ASIC development and investment in specialised silicon.
Semiconductor News Headlines
MulticoreWare Acquires Simulus Automation
MulticoreWare has acquired semiconductor design and verification specialist Simulus Automation, expanding its capabilities across the silicon development lifecycle. The acquisition brings hardware design and verification expertise into MulticoreWare’s existing AI and accelerated-computing portfolio, reflecting the increasing convergence of hardware and software development.
UK Semiconductor Groups Unite Under UKSIA
TechWorks has announced the formation of the UK Semiconductor Industry Association (UKSIA), bringing several semiconductor-focused communities together under a single industry umbrella. The initiative aims to provide a more coordinated voice for the UK semiconductor sector and strengthen engagement with government, funding programmes and the wider technology ecosystem.
Siemens and NanoBridge Semiconductor Advance FPGA Design Flows
NanoBridge Semiconductor has adopted Siemens’ Precision FPGA Synthesis technology for its FPGA device families. The collaboration will provide design flows optimised for NanoBridge’s NBS6503H and NBS1201 devices, supporting the development of low-power semiconductor technologies for harsh environments.
NSA Publishes ASIC Security Best Practices
The US National Security Agency (NSA) has released two technical reports addressing security threats during ASIC design and manufacturing. The guidance includes an ASIC threat catalogue covering 18 categories of potential compromise, alongside recommended mitigations and assurance practices intended to strengthen security throughout the ASIC development lifecycle.
TSMC Expands Advanced Packaging and Verification Capabilities
TSMC is expanding its advanced packaging operations in Kaohsiung with a new facility focused on packaging development and verification. The investment reflects the increasing importance of advanced packaging as AI and high-performance computing systems place greater demands on bandwidth, power delivery and multi-die integration.
Qualcomm and Amazon Partner on AI Data Centre Silicon
Qualcomm and Amazon are collaborating on customised silicon for AI data centre infrastructure. The multi-generation partnership will focus on AI inference and optical connectivity, with solutions supporting data rates of up to 1.6Tbps. The collaboration reflects continued demand for specialised, energy-efficient silicon as AI workloads place increasing demands on data centre infrastructure.
EnSilica Opens New Semiconductor Centre in Milan
EnSilica is opening a Space and Communications Semiconductor Centre of Excellence in Milan, with plans to initially recruit 20 specialist modem and mmWave engineers. The centre will support ASIC development for space and communications applications, including modem architecture, digital signal processing and mmWave technologies.
VerifAIX Raises $5 Million for AI-Driven Chip Verification
VerifAIX has raised $5 million in seed funding to develop what it describes as a verification trust layer for AI-driven chip design. Its platform combines AI with formal methods to connect specifications, RTL and verification assets, with the aim of improving traceability and identifying gaps throughout the verification process.
ChipAgents Reports 80% Reduction in NVM IP Verification Effort
ChipAgents has reported that eMemory reduced the effort required for functional-model verification of its NeoFuse NVM IP by approximately 80%, from an estimated four days to five hours. The workflow used AI agents to analyse documentation, generate a verification plan and construct a UVM testbench, demonstrating a practical application of agentic AI in semiconductor verification.
Synopsys and TSMC Expand Agentic AI and Advanced Design Collaboration
Synopsys and TSMC have announced new collaborations covering AI-assisted engineering, advanced-node design and multi-die systems. The work includes agentic AI workflows for digital, analog and chiplet design, as well as support for TSMC’s A14 process and CoWoS advanced packaging technologies. The collaboration reflects the growing integration of AI, EDA and advanced manufacturing technologies within semiconductor design flows.
Synopsys Introduces Autonomous Engineering Platform
Synopsys has announced its Autopilot platform and a portfolio of AgentEngineer solutions designed to support longer-running engineering workflows. The agents target areas including verification, implementation, analog design, manufacturing and simulation, moving beyond individual AI-assisted tasks towards more automated engineering workflows.
Google Explores AI Compute in Space
Google is testing whether its Tensor Processing Units (TPUs) could support AI workloads in space through Project Suncatcher. The project is investigating the feasibility of using solar-powered satellites as part of future AI infrastructure, with thermal management, radiation and reliable operation among the engineering challenges that need to be addressed.
Technical Reads & Research Highlights
| Title | Source |
|---|---|
| Enhancing SoC HW/SW co-verification with FPGA-based prototyping | EDN |
| Security Sign-Off Is Coming For Chips — But Standards May Not Be Enough | SemiEngineering |
| Why a nine-month AI chip tape-out matters | EDN |
| Token Costs Are Becoming The New EDA Budget Battle | SemiEngineering |
| The Hardware-assisted Verification Imperative | EE Times |
| From AI-Assisted EDA to AI-Mediated Engineering | EE Times |
| Accelerating Shift Left With Early RTL DFT Analysis And Connectivity Verification | SemiEngineering |
| You just inherited a Simulink model you have never seen before. Now what? | EDN |
| AI-Driven Development: Why Verification Matters More Than Ever | Arteris via Design & Reuse |
| Hardware-Software Co-Design In The AI Era | SemiEngineering |
| How OpenAI Used Its Own LLMs to Design Its Jalapeño Chip | IEEE Spectrum |
| Five signals from the 2026 functional verification study | Siemens |
| How AI Is Accelerating PCB Design and Prototyping | EE Times |
| Make Your Interface Work for Your AI SoC—A 10 Step Program: Verification with Simulation | Synopsys |
| EDA’s Future Is Evidence-Driven Automation | SemiEngineering |
| Why Verification Needs A Thread, Not More Fragments | SemiEngineering |
September’s semiconductor news highlights a continued shift towards more automated and AI-assisted approaches to chip design and verification. From agentic AI and formal methods to advanced packaging, custom ASICs and security-focused design practices, these developments point to an increasingly integrated semiconductor engineering landscape.
For ASIC and verification engineers, the focus remains on how these technologies can be applied effectively while maintaining the reliability, traceability and verification discipline required for complex silicon development.
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