Verification Futures UK 2026

The Verification Futures UK 2026 conference will take place on 23 June 2026 at the University of Reading, bringing together verification engineers, EDA vendors and researchers for a full day of technical sessions and industry discussion.

Available to attend both in-person and remotely, attendance is currently free. However the free registration window is expected to close soon, making early sign-up advisable for engineers and teams planning to attend.

What Is Verification Futures?

Verification Futures is an annual conference focused on the challenges and methodologies involved in verifying increasingly complex semiconductor designs. The event runs alongside Semiconductors Futures 2026, broadening the programme to include wider design, manufacturing and market perspectives.

Attendees usually include:

Design verification engineers
SoC architects
EDA tool developers
Students & early-career engineers

The event brings together engineers, tool vendors and researchers for technical presentations and discussion.

Verification Futures UK 2026 Agenda Overview

Verification Futures UK 2026, co-located with Semiconductors Futures 2026, is organised by Tessolve and co-organised with Alpinum Consulting. The conference agenda combines technical presentations, exhibitions, training and networking sessions focused on the practical challenges of hardware and software verification.

The event serves as a collaborative forum where end-users can define their verification challenges and engage directly with engineers, researchers and tool vendors to shape real-world solutions.

In 2026, the programme maintains a strong emphasis on verification methodologies, design verification tools and engineering workflows.

Core Verification Futures Technical Themes

The Verification Futures track will cover a broad range of topics central to modern verification environments, including:

Formal methods for complex SoC verification
CPU and RISC-V verification strategies
Open-source and licence-free verification tools
Artificial intelligence in design verification (AI in DV)
Verification planning, coverage and closure
Hardware/software co-verification techniques

These sessions are designed to address both methodological challenges and tooling considerations across simulation, formal and hybrid verification flows.

Notable Technical Sessions

The 2026 programme features a range of technical talks spanning formal verification, AI-assisted verification and open-source tool flows. Confirmed sessions include:

Session Title	Delivered by
AI Meets Formal: From Trust Anchors to Productivity Gains	Dr. Tobias Ludwig – LUBIS EDA
Opensource Verification Tools For Hyperscale Data Centre Silicon	Doug Carson – Keysight
Reliable Hardware Trojan Detection for RISC-V Processors using Formal Verification	Christian Appold – DENSO AUTOMOTIVE Deutschland GmbH
Using AI in Analog and Mixed-Signal Hardware Verification	Ahmed Fergany
Design and Verification of an AI Accelerator in Neuromorphic Chips	Abhyarthana Bisoyi – Odisha University of Technology and Research

These sessions highlight the conference’s focus on both advanced research topics and practical engineering challenges encountered in real-world silicon projects.

*Technical sessions span formal verification, AI in DV and open-source toolchains.*

Semiconductors Futures 2026: Parallel Tracks and Expanded Scope

Running in tandem, Semiconductors Futures 2026 broadens the focus beyond verification to cover wider semiconductor trends, including:

AI and machine learning in IP and SoC design
The impact of AI on EDA tools and workflows
FPGA and mixed-signal development
Emerging technologies such as quantum computing, photonics and chiplet-based architectures

It has been confirmed that new tracks will consider emerging technologies such as quantum computing, photonics, and chiplets, as well as startups and investments.

As a result of the co-location approach, attendees can move between tracks to gain both deep technical verification insights and a more comprehensive understanding of industry direction.

Free Registration Deadline and How to Register

Registration for Verification Futures UK 2026 is currently available through the official event page. Because attendance is free for both in-person and online participants, demand is typically high. Engineers who are considering attending are encouraged to register early to secure access and receive programme updates.

Register via the official event page -> Verification Futures UK 2026 | (FREE registration until 31 March)

Why Events Like Verification Futures Matter to the Industry

As semiconductor designs continue to increase in complexity, verification has become one of the most resource-intensive phases of the development cycle. Conferences like this provide an important opportunity for engineers to exchange experience, evaluate new tools and discuss practical solutions to shared challenges.

At AsicPro Solutions, we follow industry events closely to stay aligned with evolving verification methodologies and emerging tooling trends. Insights shared at conferences often reflect the real challenges being faced across production silicon projects, from coverage closure to system-level validation.

Follow our blog or connect with us on LinkedIn to stay informed about upcoming events, technical insights and verification-focused resources.

Verification Futures UK 2026: Agenda, Speakers and Free Registration Details