Siemens EDA Launches Questa One Verification Tool for Faster SoC Design At User2User in Munich, Siemens EDA unveiled Questa One – a unified, next-generation verification platform built to handle the rising complexity of SoC and ASIC designs in 2025 and … Read More
EDA Tools & Methodologies
Synopsys Unveils Advanced Hardware-Assisted Verification Solutions: ZeBu-200 & HAPS-200
Discover how Synopsys is addressing design verification complexities in the AI era with advanced hardware-assisted verification solutions. … Read More
Accellera Approves Universal Verification Methodology for Mixed-Signal (UVM-MS) 1.0 Standard
Accellera Systems Initiative has officially approved the Universal Verification Methodology for Mixed-Signal (UVM-MS) 1.0 standard. This release is now available for immediate download. UVM-MS 1.0 establishes a standardized methodology for analog and mixed-signal (AMS) verification, building on the UVM IEEE 1800.2 standard. This methodology enhances AMS verification by enabling the reuse of proven components, leading to increased productivity, improved quality and streamlined workflows. … Read More
LPDDR6 Design & Test Workflow Solution Unveiled by Keysight
Keysight Technologies has launched a complete design and test solution for next-generation Low-Power Double Data Rate 6 (LPDDR6) memory technology. This solution helps engineers accelerate development, reduce design risks and improve product performance. Next-generation memory requires advanced testing to ensure reliability, speed and accuracy. Keysight’s LPDDR6 solution simplifies this process with high-precision, automated testing.
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QuickLogic Unveils Enhanced Aurora™ FPGA/eFPGA User Tools for Elevated Reconfigurable Computing
QuickLogic Corporation (NASDAQ: QUIK) has recently unveiled an updated version of its Aurora eFPGA development tool suite, now in its 2.4 iteration. This latest version brings substantial improvements to the eFPGA utilization and performance for designers, with a special emphasis … Read More