From industry leading acquisitions to new 2nm platforms, July was full of major semiconductor announcements across design, verification, packaging and compute. Whether you’re tracking industry acquisitions, design tool updates or emerging materials, this monthly roundup highlights the key developments – … Read More
Chip Design
The Future of EDA: 2025 Trends Impacting ASIC Design and Verification
As the development process of application-specific integrated circuits (ASICs) becomes more complex, electronic design automation (EDA) vendors are evolving to meet the demands of a fast-changing industry. In 2025, we’re seeing a powerful convergence of AI-driven automation, chiplet-based architectures, cloud-native … Read More
Synopsys Completes Ansys Acquisition: What is Means for Design and Verification Teams
On July 17, 2025, Synopsys officially completed its $35 billion acquisition of Ansys, cemeting one of the most significant mergers in the history of electronic design automation (EDA). First announced in January 2024, the deal unites two global leaders – … Read More
Siemens Expands EDA Portfolio at DAC 2025 with New 3D IC Solutions
At DAC 2025, Siemens Digital Industries Software unveiled two new tools designed to enhance the manageability, predictability and success of 3D IC design. As 2.5D and 3D Integrated Circuits (IC) become increasingly vital in advanced chip design, traditional EDA workflows are under pressure. Rising complexity, thermal management issues and integration risks are pushing design teams to seek advanced design and test solutions. … Read More
Silicon Island – From Fields to Fabs: Ireland’s National Chips Strategy Takes Root
Welcome to Silicon Island – Ireland’s National Semiconductor Strategy The strategy was officially launched at the Tyndall National Institute in Cork by Peter Burke, the Minister for Enterprise, Trade and Employment. As Ireland’s national institute for semiconductors, Tyndall plays a … Read More
Siemens EDA Launches Questa One to Revolutionize Chip Verification
Siemens EDA Launches Questa One Verification Tool for Faster SoC Design At User2User in Munich, Siemens EDA unveiled Questa One – a unified, next-generation verification platform built to handle the rising complexity of SoC and ASIC designs in 2025 and … Read More
What is UVM? A Beginner’s Guide to Universal Verification Methodology
At the core of our verification process lies the powerful Universal Verification Methodology (UVM). This industry-standard methodology empowers us to deliver exceptional quality and efficiency in design verification. By harnessing the standardized framework of UVM, we ensure thorough and reliable … Read More
Synopsys at GTC 2025: Transforming Chip Design with NVIDIA GB200 Grace Blackwell Superchip
2025 is shaping up to be a landmark year for the EDA landscape. By leveraging cutting-edge AI and accelerated computing with the NVIDIA Grace Blackwell platform, Synopsys is focused on transforming chip design and powering the future of semiconductor innovation. … Read More
Marvell Advances AI & Cloud Innovation with TSMC’s 2nm Silicon
Marvell has successfully demonstrated its next-generation 2nm silicon IP platform, designed to boost AI and cloud infrastructure innovation. … Read More
LPDDR6 Design & Test Workflow Solution Unveiled by Keysight
Keysight Technologies has launched a complete design and test solution for next-generation Low-Power Double Data Rate 6 (LPDDR6) memory technology. This solution helps engineers accelerate development, reduce design risks and improve product performance. Next-generation memory requires advanced testing to ensure reliability, speed and accuracy. Keysight’s LPDDR6 solution simplifies this process with high-precision, automated testing.
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