From newcomers to seasoned engineers, understanding the vocabulary of verification is key to collaborating effectively, debugging faster and delivering successful silicon. Whether you’re building testbenches or reviewing specs, knowing the right terminology helps streamline communication, accelerate debugging and reduce costly … Read More
Blog and News
DVCon Europe 2025: Submission Deadlines, Key Themes & How to Get Involved
If you work in ASIC design, verification or the broader Electronic Design Automation (EDA) ecosystem, DVCon Europe 2025 should be on your radar. Held in Munich, Germany on October 14 – 15, this year’s conference promises to deliver valuable insights, … Read More
Silicon Island – From Fields to Fabs: Ireland’s National Chips Strategy Takes Root
Welcome to Silicon Island – Ireland’s National Semiconductor Strategy The strategy was officially launched at the Tyndall National Institute in Cork by Peter Burke, the Minister for Enterprise, Trade and Employment. As Ireland’s national institute for semiconductors, Tyndall plays a … Read More
Upcoming Semiconductor Events to Attend in North America (2025)
North America is home to some of the biggest and most influential semiconductor industry events on the global calendar. Our curated guide highlights key conferences, user group meetings and symposiums happening across the US throughout the rest of 2025. Whether … Read More
Siemens EDA Launches Questa One to Revolutionize Chip Verification
Siemens EDA Launches Questa One Verification Tool for Faster SoC Design At User2User in Munich, Siemens EDA unveiled Questa One – a unified, next-generation verification platform built to handle the rising complexity of SoC and ASIC designs in 2025 and … Read More
ASIC Design & Verification Glossary (2025 Edition)
This glossary covers essential terms and concepts in ASIC design, System-on-Chip (SoC) development and functional verification. Whether you’re a seasoned design verification engineer used to working with EDA tools or a recent graduate engineer getting started with UVM and SystemVerilog, … Read More
What is UVM? A Beginner’s Guide to Universal Verification Methodology
At the core of our verification process lies the powerful Universal Verification Methodology (UVM). This industry-standard methodology empowers us to deliver exceptional quality and efficiency in design verification. By harnessing the standardized framework of UVM, we ensure thorough and reliable … Read More
Top Resources for ASIC Design & Verification Engineers (2025 Edition)
Searching for the Top Resources for ASIC Design & Verification Engineers? Whether you’re just getting started with ASIC design or you’re deep into verifying complex chips, staying up to date with the latest knowledge, tools and thought leadership is essential. … Read More
Quantum Computing and Semiconductors: Breakthroughs & Industry Trends (2025)
Each year on April 14th, World Quantum Day celebrates progress in quantum science and 2025 has already delivered some standout developments. As quantum computing inches closer to real-world applications, semiconductor technologies are playing a central role in moving the field … Read More
ASIC Design for IoT: Unlocking the Future of Connected Solutions with Custom Silicon
Celebrating World IoT Day with a closer look at the custom chips powering tomorrow’s connected world. World IoT Day 2025 April 9 marked World IoT Day, a global celebration of innovation in the Internet of Things. From smart home systems … Read More