Learn SystemVerilog: The Best Resources for ASIC Verification Engineers SystemVerilog remains one of the most important languages in modern ASIC verification. Whether you’re a junior engineer preparing for your first verification role, an RTL designer looking to expand your skill … Read More
Design & Verification
ASIC Verification in 2026: Key Challenges and Industry Trends
What Major Challenges Are Verification Engineers Facing in 2026? As semiconductor devices continue to grow in complexity, ASIC verification is becoming one of the most demanding stages of chip development. Modern designs integrate billions of transistors, heterogeneous IP, AI accelerators, … Read More
Formal Verification vs Simulation: Where Each Methodology Fits in Modern ASIC Verification
Formal Verification vs Simulation: Where Each Methodology Fits in Modern ASIC Verification If you’ve attended a verification conference, watched a webinar, or browsed industry publications recently, you’ve probably noticed formal verification appearing more frequently in discussions around coverage closure, bug … Read More
Siemens and Arm Use Hardware-Assisted Verification for AGI CPU Validation
Siemens and Arm Use Hardware-Assisted Verification for AGI CPU Validation Hardware-assisted verification is becoming increasingly important as AI chips grow larger, more complex and more software-dependent. A recent collaboration between Siemens and Arm demonstrates how hardware-assisted verification (HAV) is helping … Read More
RISC-V International Launches Centralised Specifications Library
RISC-V International Launches Centralised Specifications Library In early May 2026, RISC-V International announced the official launch of the RISC-V Ratified Specifications Library, a centralised documentation hub designed to consolidate all ratified RISC-V specifications into a single accessible location. Over the … Read More
DVCon Europe 2026: What to Expect and Key Deadlines for Open Call Submissions
DVCon Europe 2026: What to Expect and Key Deadlines for Open Call Submissions DVCon Europe is one of the most important events in the design and verification calendar, bringing together engineers, researchers and tool vendors focused on advancing verification methodologies. … Read More
Upcoming Semiconductor Event Open Calls (2026): Key Deadlines for Design Verification Engineers
Planning to Present Your Work This Year? For engineers working across ASIC design, verification and hardware development, industry conferences remain one of the best ways to share insights, gain visibility and stay connected to the latest trends. From verification methodologies and SoC … Read More
World Quantum Day 2026: 3 Essential Reads on Quantum Verification for Hardware Engineers
World Quantum Day 2026: 3 Essential Reads on Quantum Verification for Hardware Engineers Each year, World Quantum Day (April 14th) highlights the rapid progress being made in quantum science. Over the past 12 months, we’ve seen continued momentum across the … Read More
Improve Your ASIC Verification Skills: Webinars for Semiconductor Engineers
Improve Your ASIC Verification Skills: Webinars for Semiconductor Engineers Staying current in ASIC verification is increasingly important as methodologies, tools, and design complexity continue to evolve. From established approaches like UVM and formal verification to newer areas such as AI-assisted … Read More
10 Best Semiconductor Podcasts for Engineers in 2026
10 Best Semiconductor Podcasts for Engineers in 2026 The semiconductor industry evolves at a relentless pace. New process nodes, AI-driven demand, chiplet architectures and shifting geopolitics are constantly reshaping how chips are designed and manufactured. Podcasts offer a simple way … Read More