On July 17, 2025, Synopsys officially completed its $35 billion acquisition of Ansys, cemeting one of the most significant mergers in the history of electronic design automation (EDA). First announced in January 2024, the deal unites two global leaders – … Read More
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ASIC Design, Verification & Semiconductor Innovation
Stay ahead with practical insights, easy to follow guides and the latest trends in chip design, verification and semiconductor technology. The AsicPro Blog provides engineers, verification specialists and technical leaders with actionable content to tackle complex workflows, optimize chip development and drive innovation in modern ASIC design and verification.
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Explore practical guides, methodologies and best practices for efficient and reliable ASIC design and verification.
Semiconductor Events
Discover the top events that connect engineers and innovators across semiconductors in EMEA and beyond.
Semiconductor News Roundup: Industry Highlights (May – July 2025)
Welcome to the first edition of our Semiconductor News Roundup! In an ever-evolving industry, this is your essential summary of the latest updates in chip design, verification and semiconductor innovation. This edition covers highlights from May to July 2025, including … Read More
Semiconductor Events Calendar: Q3 & Q4 2025
Planning your calendar for the second half of 2025? Whether you’re looking to stay ahead of the latest EDA tool innovations, deepen your ASIC verification knowledge or connect with global semiconductor leaders, our calendar has got you covered. We’ve included … Read More
Siemens Expands EDA Portfolio at DAC 2025 with New 3D IC Solutions
At DAC 2025, Siemens Digital Industries Software unveiled two new tools designed to enhance the manageability, predictability and success of 3D IC design. As 2.5D and 3D Integrated Circuits (IC) become increasingly vital in advanced chip design, traditional EDA workflows are under pressure. Rising complexity, thermal management issues and integration risks are pushing design teams to seek advanced design and test solutions. … Read More
ASIC Verification Glossary: 20+ Essential Terms Every Engineer Should Know
From newcomers to seasoned engineers, understanding the vocabulary of verification is key to collaborating effectively, debugging faster and delivering successful silicon. Whether you’re building testbenches or reviewing specs, knowing the right terminology helps streamline communication, accelerate debugging and reduce costly … Read More
DVCon Europe 2025: Submission Deadlines, Key Themes & How to Get Involved
If you work in ASIC design, verification or the broader Electronic Design Automation (EDA) ecosystem, DVCon Europe 2025 should be on your radar. Held in Munich, Germany on October 14 – 15, this year’s conference promises to deliver valuable insights, … Read More
Silicon Island – From Fields to Fabs: Ireland’s National Chips Strategy Takes Root
Welcome to Silicon Island – Ireland’s National Semiconductor Strategy The strategy was officially launched at the Tyndall National Institute in Cork by Peter Burke, the Minister for Enterprise, Trade and Employment. As Ireland’s national institute for semiconductors, Tyndall plays a … Read More
Upcoming Semiconductor Events to Attend in North America (2025)
North America is home to some of the biggest and most influential semiconductor industry events on the global calendar. Our curated guide highlights key conferences, user group meetings and symposiums happening across the US throughout the rest of 2025. Whether … Read More
Siemens EDA Launches Questa One to Revolutionize Chip Verification
Siemens EDA Launches Questa One Verification Tool for Faster SoC Design At User2User in Munich, Siemens EDA unveiled Questa One – a unified, next-generation verification platform built to handle the rising complexity of SoC and ASIC designs in 2025 and … Read More
ASIC Design & Verification Glossary (2025 Edition)
This glossary covers essential terms and concepts in ASIC design, System-on-Chip (SoC) development and functional verification. Whether you’re a seasoned design verification engineer used to working with EDA tools or a recent graduate engineer getting started with UVM and SystemVerilog, … Read More